Measurement circuit with improved accuracy

ABSTRACT

A measurement circuit for measuring input voltages in an automatic test system includes a pedestal source, a differential amplifier, and a feedback amplifier. The differential amplifier measures a “residue,” i.e., a difference between an input signal and a pedestal signal from the pedestal source, which is programmed to equal an expected input voltage. The feedback amplifier boosts the residue before it is presented to the differential amplifier, and thus allows the differential amplifier to be operated at lower gain than is typically used in conventional topologies. Consequently, the effect of the errors in the differential amplifier are reduced.

CROSS-REFERENCES TO RELATED APPLICATIONS

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STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

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REFERENCE TO MICROFICHE APPENDIX

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BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to measurement circuits used inautomatic test equipment, and, more particularly, to measurementcircuits employing accurate pedestal sources.

2. Description of Related Art

A fundamental requirement of automatic test systems is the ability tomeasure accurately electronic signals from devices under test. A varietyof circuit topologies have been devised for this purpose.

FIG. 1 shows a high-level example of a measurement circuit that employsan accurate pedestal source 112. The pedestal source is generallyprogrammable and is adjusted to produce an accurate voltage V_(PED)approximately equal to an expected differential input voltage HI−LO ofthe measurement circuit. A summing circuit 114 adds a low side (LO) ofthe measurement circuit to V_(PED), and a differential amplifier 110measures the difference between a high side of the measurement circuit(HI) and the output of the summer 114 (LO+V_(PED)). The output of thedifferential amplifier is then customarily converted to a digital signalby an analog-to-digital converter 116.

The measurement circuit reads the value, G*[(HI−LO)−V_(PED)], where G isthe gain of the differential amplifier 110. This reading corresponds tothe difference, or “residue,” between the actual input voltage HI−LO andthe programmed expected input voltage, V_(PED). This reading can beconverted to a measurement of input voltage, HI−LO, by and adding anumeric value that corresponds to V_(PED) to the reading (and correctingfor gain). Thus, for example, if the measurement circuit were to read2.4 volts with G=100 and V_(PED)=1 volt, the actual input voltageimplied by these conditions would be 1 volt+2.4 volts/100 =1.024 volts.

The measurement circuit can be made to be very precise because V_(PED)can be precisely characterized and can be very stable. We haverecognized, however, that the measurement circuit has errors that mayadversely affect its performance. For example, offset voltage errors inthe differential amplifier 110 induces errors in the measurementcircuit. Because the residue is generally a small voltage, it isdesirable to operate the differential amplifier 110 at high gain, toassure that the residue is large enough to be readily measured. As isknown, however, offset errors of differential amplifiers growproportionally larger as gain is increased.

It would be desirable for measurement circuits employing pedestalsources to produce large residue signals without being so adverselyaffected by errors in the differential amplifier.

BRIEF SUMMARY OF THE INVENTION

With the foregoing background in mind, it is an object of the inventionfor a measurement circuit employing a pedestal source to have reducederrors.

To achieve the foregoing object, as well as other objectives andadvantages, a measurement circuit includes a feedback amplifier and adifferential amplifier, each having a first input, a second input, andan output. The first input of the feedback amplifier receives an inputsignal. The first input of the differential amplifier is coupled to apedestal source, and the second input of the differential amplifier iscoupled to the output of the feedback amplifier. An attenuator iscoupled between the first and second inputs of the differentialamplifier and provides a feedback signal, which is conveyed to thesecond input of the feedback circuit.

The operation of the feedback amplifier effectively boosts the residuesignal and therefore allows the differential amplifier to be operated atsubstantially reduced gain, reducing overall circuit errors.

BRIEF DESCRIPTION OF THE DRAWINGS

Additional objects, advantages, and novel features of the invention willbecome apparent from a consideration of the ensuing description anddrawings, in which

FIG. 1 is block diagram of a measurement circuit employing a pedestalsource according to the prior art;

FIG. 2 is a block diagram of an improved measurement circuit employing apedestal source according to the invention;

FIG. 3 is a simplified schematic of the measurement circuit of FIG. 2;and

FIG. 4 is a high-level block diagram of a tester that includesmeasurement circuits according to the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 2 shows an illustrative embodiment of a measurement circuitaccording to the invention. Certain portions of the measurement circuitof FIG. 2 are similar to those of FIG. 1. For instance, pedestal source212 is similar to pedestal source 112, summer 214 is similar to summer114, and ADC 216 is similar to ADC 116. In addition, differentialamplifier 210 of FIG. 2 is similar to differential amplifier 110 of FIG.1, except that it, is preferably operated at substantially lower gain.

The measurement circuit of FIG. 2 also produces a “residue,” i.e., asignal indicative of the difference between the input voltage, hereHI−LO, and the pedestal voltage, V_(PED). However, the residue producedin FIG. 2 is substantially larger than the residue produced in FIG. 1.In FIG. 1, the differential amplifier 110 handles the entire task ofamplifying the residue to provide a large enough signal that can readilybe measured by the ADC 116. In FIG. 2, however, the differentialamplifier 110 and a feedback circuit share this task. Preferably, thefeedback circuit provides most or all of the gain for amplifying theresidue, and the differential amplifier provides relatively little gain.

The feedback circuit includes a feedback amplifier 220 and an attenuator222. The attenuator 222 provides a feedback signal to the feedbackamplifier 220. The attenuator 222 has a nominal attenuation of 1/G,which means that the voltage fed back to the feedback amplifier 220 isV_+(V ₊ −V_)/G,where V₊ and V_are the non-inverting and inverting inputs of thedifferential amplifier 210, respectively. The HI side of the inputvoltage is applied to an input of the feedback amplifier 220. Also, theLO side of the input voltage is added to the pedestal voltage andapplied to the inverting input of the differential amplifier 210. Byclosed-loop operation of the feedback amplifier and attenuator, thenon-inverting (+) input of the differential amplifier 210 is forced to alevel that equalsHI+((HI−(LO+V _(PED)))*(G−1).Assuming that the differential amplifier 210 has a gain of one, theoutput of the differential amplifier is thus $\begin{matrix}{V_{DIFF} = {V_{+} - V_{-}}} \\{\quad{= {{HI} + {\left( \left( {{HI} - {LO} - V_{PED}} \right) \right)*\left( {G - 1} \right)} - \left( {{LO} + V_{PED}} \right)}}} \\{\quad{= {G*\left( {\left( {{HI} - {LO}} \right) - V_{PED}} \right)}}} \\{\quad{= {G*({Residue})}}}\end{matrix}$

This value is exactly the desired quantity, and it is accomplished withthe differential amplifier 210 having a gain of only one. Aftermeasuring this value, one can compute the actual input voltage, HI−LO,as V_(PED)+V_(DIFF)/G.

All other things being equal, the errors in the circuit of FIG. 2 aremuch lower than those in the circuit of FIG. 1. Because the output ofthe differential amplifier V_(DIFF) is divided by G to compute the inputvoltage, the effect of the differential amplifier's offset voltage onoverall circuit performance is negligible. The feedback amplifier 220adds some offset error, but it can be made negligible by selecting a lowoffset operational amplifier for the feedback amplifier or by trimmingthe offset of the feedback amplifier to near zero.

The measurement circuit of FIG. 2 thus effectively transfers the sourceof offset error from the differential amplifier 210 to the feedbackamplifier 220. This may not appear at first to be a substantialimprovement. However, many low offset op amps are commerciallyavailable, whereas most differential amplifiers have relatively largeoffset error. Thus, the measurement circuit of FIG. 2 allows betteraccuracy to be achieved with readily available, commercial components.

We have also found that the measurement circuit of FIG. 2 has lowercommon mode errors than the topology of FIG. 1. Although common modeerrors of differential amplifiers tend to improve with gain, they do notimprove as much as they do in the circuit of FIG. 2. For example, thecommon mode rejection ratio (CMRR) of a conventional differentialamplifier operating at a gain of 1000 is are approximately 35 dB lessthan the CMRR of the measurement circuit of FIG. 2 operating at the samegain.

FIG. 3 shows a more detailed embodiment of the measurement circuit ofFIG. 2. In this exemplary embodiment, the feedback amplifier is seen toinclude three different stages: an input stage 322, and inverter stage324, and an integrator stage 326. Each of these three stages ispreferably implemented with a separate operational amplifier (op amp).The op amp used for the input stage 322 preferably has a low offsetvoltage and a high inherent common mode rejection ratio. The op amp usedfor the integrator stage 326 has an input resistor 344, an inputcapacitor 346, and a feedback capacitor 348, which together dominantlycontribute to the open loop gain and frequency response of the feedbackamplifier. The inverter stage 324 has input and feedback resistors 340and 342 for achieving the desired inversion for establishing the properfeedback polarity and providing additional open loop gain.Alternatively, the inverter stage can be omitted, provided that theinputs to the input stage 322 are reversed to maintain the proper senseof the feedback.

The attenuator of FIG. 3 is preferably implemented with a pair ofresistors 328 and 330. The ratio of these resistors sets the gain of thefeedback amplifier (“G” from the above equations), where the ratio ofresistor 328 to resistor 330 equals G−1.

The integrator stage 326 improves the accuracy of the measurementcircuit. As is known, integrators have extremely high gain at DC.Therefore, the output of the input stage 322 need only move by minuteamounts to establish any desired output voltage of the feedbackamplifier as a whole. This is important because the input stage 322 hasfinite open loop gain, i.e., it can only change its output voltage byexperiencing a change in voltage between its non-inverting and invertinginputs. During closed loop operation, changes in output voltage thuseffectively cause the circuit to suffer from an output-dependent offseterror, which is reflected in the measurement result. The integratorstage 326 virtually eliminates this error by ensuring that the output ofthe input stage 322 never move by more than minute amounts.

FIG. 4 shows a typical test environment in which the measurement circuitof FIGS. 2 and 3 may be used. This test environment includes anautomatic test system 400 having a test computer 410 for running a testprogram (not shown). The test computer controls instrumentation, such asstimulus circuits 414 and measurement circuits 416, for exercising adevice under test, or “DUT” 412. The measurement circuits include themeasurement circuit disclosed herein and shown in FIGS. 2 and 3. Undercontrol of the test program, the stimulus circuits 414 applypredetermined stimuli to the DUT 412, and the measurement circuits 416measure voltages and/or currents as responses from the DUT 412. The testprogram compares the measured voltages and/or currents to expectedvalues. If the readings are within allowable tolerances of the expectedvalues, the test program passes. Otherwise, the test program fails.

The test environment of FIG. 4 is useful in a manufacturing environment,where electronic circuits such as integrated circuits are fabricated. Tosave manufacturing costs, devices are tested early in the manufacturingprocess, such as before they are packaged. Devices that pass the testprogram move on to subsequent manufacturing steps, whereas devices thatfail may be discarded. Testing at this level prevents manufacturers fromperforming expensive fabrication steps on defective devices that aredestined to be thrown away, and thus lowers overall manufacturing costs.In addition, the test program may be used to grade devices according totheir performance. Devices meeting higher standards may be set aside andsold at higher prices than those performing to lower standards.

Alternatives

Having described one embodiment, numerous alternative embodiments orvariations can be made. The measurement circuit shown in FIGS. 2 and 3are configured to receive a differential input voltage having both a HIinput and a LO input. Alternatively, the LO input can be grounded,making the input signal effectively single-ended. In this case, theadder 214/314 can be omitted, and the pedestal source can be coupleddirectly to the differential amplifier 210/310.

Nominally, the HI side of the input signal is more positive than the LOside, but nothing in the design of the measuring circuit requires this.The LO side can convey more positive voltages than the HI side, orvice-versa.

Although the measurement circuit shown in FIGS. 2 and 3 receives aninput signal as a voltage (either differential or single-ended), nothingrequires that the circuit be used for measuring only voltages from adevice under test. The measurement circuit can also be used formeasuring current, for example, by connecting a shunt resistor betweenHI and LO and measuring the voltage induced by current flowing acrossthe shunt.

While the invention has been particularly shown and described withreference to the preferred embodiments thereof, it will be understood bythose skilled in the art that various changes in form and detail may bemade therein without departing from the spirit and scope of theinvention.

1. A measurement circuit, comprising: a differential amplifier having afirst input and a second input; a pedestal source coupled to the firstinput of the differential amplifier for generating a pedestal signal; afeedback amplifier having a first input for receiving an input signal tobe measured, a second input for receiving a feedback signal, and anoutput coupled to the second input of the differential amplifier; and anattenuator coupled between the first and second inputs of thedifferential amplifier and providing the feedback signal for thefeedback amplifier.
 2. A measurement circuit as recited in claim 1,wherein the input signal at the first input of the feedback amplifier isa HI side of a differential input signal, the measurement circuitfurther comprising: an adding circuit coupled in series with thepedestal source for adding a LO side of the differential input signal tothe pedestal signal.
 3. A measurement circuit as recited in claim 1,wherein the attenuator comprises: a first impedance having a first nodecoupled to the output of the feedback amplifier and a second nodecoupled to the second input of the feedback amplifier; and a secondimpedance having a first node coupled to the second input of thefeedback amplifier and a second input coupled to the first input of thedifferential amplifier.
 4. A measurement circuit as recited in claim 1,wherein the first and second impedances are resistors each having aresistance, and the resistance of the first impedance is at least 100times greater than the resistance of the second impedance.
 5. Ameasurement circuit as recited in claim 4, wherein the differentialamplifier has a differential gain of less than
 100. 6. A measurementcircuit as recited in claim 1, wherein the pedestal source comprises adigital-to-analog converter.
 7. A measurement circuit as recited inclaim 6, wherein the pedestal source is programmable to a value thatequals an expected input voltage of the measurement circuit.
 8. Ameasurement circuit as recited in claim 1, wherein the feedbackamplifier comprises a compensation amplifier for establishing desireddynamic characteristics of the feedback circuit.
 9. A measurementcircuit as recited in claim 8, wherein the compensation amplifiercomprises an integrator.
 10. A measurement circuit as recited in claim1, wherein the feedback amplifier comprises: an input stage forreceiving the input signal to be measured and the feedback signal; andan integrator stage, having an input coupled to the output of the inputstage and an output coupled to the second input of the differentialamplifier, for providing high gain at DC.
 11. A measurement circuit asrecited in claim 10, wherein the feedback amplifier further comprises aninverting stage coupled in series between the output of the input stageand the input of the inverter stage.
 12. A measurement circuit asrecited in claim 11, wherein each of the input stage, inverting stage,and integrator stage comprises at least one op amp.
 13. An automatictest system for testing electronic devices, comprising: a computer forexecuting a test program, a plurality of stimulus circuits operableunder control of the computer; and a plurality of measurement circuitsoperable under control of the computer, each measurement circuitincluding a differential amplifier having a first input and a secondinput; a pedestal source coupled to the first input of the differentialamplifier for generating a pedestal signal; a feedback amplifier havinga first input for receiving an input signal to be measured, a secondinput for receiving a feedback signal, and an output coupled to thesecond input of the differential amplifier; and an attenuator havingfirst and second nodes coupled respectively to the first and secondinputs of the differential amplifier, and a third node for providing thefeedback signal for the feedback amplifier.
 14. An automatic test systemas recited in claim 13, wherein the input signal at the first input ofthe feedback amplifier is a HI side of a differential input signal, themeasurement circuit further comprising: an adding circuit coupled inseries with the pedestal source for adding a LO side of the differentialinput signal to the pedestal signal.
 15. An automatic test system asrecited in claim 13, wherein the attenuator comprises: a first impedancehaving a first node coupled to the output of the feedback amplifier anda second node coupled to the second input of the feedback amplifier; anda second impedance having a first node coupled to the second input ofthe feedback amplifier and a second input coupled to the first input ofthe differential amplifier.
 16. An automatic test system as recited inclaim 13, wherein the first and second impedances are resistors eachhaving a resistance, and the resistance of the first impedance is atleast 100 times greater than the resistance of the second impedance. 17.An automatic test system as recited in claim 16, wherein thedifferential amplifier has a differential gain of less than
 100. 18. Amethod of manufacturing an electronic circuit, comprising: performing aplurality of manufacturing steps on the electronic circuit; and testingthe electronic circuit to verify the plurality of manufacturing steps,wherein the step of testing includes applying stimuli to the electroniccircuit and measuring responses from the electronic circuit, and whereinthe step of measuring responses employs a measurement circuit includinga differential amplifier having a first input and a second input; apedestal source coupled to the first input of the differential amplifierfor generating a pedestal signal; a feedback amplifier having a firstinput for receiving an input signal, a second input for receiving afeedback signal, and an output coupled to the second input of thedifferential amplifier; and an attenuator coupled between the first andsecond inputs of the differential amplifier and providing the feedbacksignal for the feedback amplifier.
 19. A method as recited in claim 18,wherein the step of measuring responses includes reading values from themeasurement circuit.
 20. A method as recited in claim 19, whereinfurther comprising comparing the values read with test limits todetermine whether the electronic circuit passes or fails its tests. 21.A method as recited in claim 18, wherein the input signal at the firstinput of the feedback amplifier is a HI side of a differential inputsignal, the measurement circuit further comprising: an adding circuitcoupled in series with the pedestal source for adding a LO side of thedifferential input signal to the pedestal signal.
 22. A method asrecited in claim 18, wherein the attenuator comprises: a first impedancehaving a first node coupled to the output of the feedback amplifier anda second node coupled to the second input of the feedback amplifier; anda second impedance having a first node coupled to the second input ofthe feedback amplifier and a second input coupled to the first input ofthe differential amplifier.
 23. An automatic test system as recited inclaim 18, wherein the first and second impedances are resistors eachhaving a resistance, and the resistance of the first impedance is atleast 100 times greater than the resistance of the second impedance. 24.An automatic test system as recited in claim 23, wherein thedifferential amplifier has a differential gain of less than 10.